xDSL is a generic name of various DSLs (Digital Subscriber Line, digital subscriber line), and xDSL is transmission technology to transmit high-speed data in a telephone twisted pair (that is, unshielded twist pair, Unshielded Twist Pair, UTP for short). At a central office (CO, Central Office) of an xDSL system, a device, DSLAM (Digital Subscriber Line Access Multiplexer, DSL access multiplexer), providing access of multichannel xDSL signals exists.
Due to existence of the phenomenon of electromagnetic induction, multichannel signals accessed by the DSLAM interfere with each other, which is called crosstalk (Crosstalk). As shown in FIG. 1, two kinds of crosstalk exist: near-end crosstalk (NEXT, Near-end crosstalk) and far-end crosstalk (FEXT, Far-end crosstalk). Uplink and downlink channels of an xDSL adopts frequency division multiplexing, so that the NEXT does not harm system performance badly, but the FEXT seriously affects transmission performance of the line. For example, when multiple users in a bundle of cables all need to subscribe to an xDSL service, the FEXT may result in problems such as low rates and unstable performance of some lines and even failure in subscription. In order to eliminate the FEXT, currently the industry proposes a vectored-DSL (Vectored-DSL) technology, and the technology mainly uses a joint receiving and transmission function of the DSLAM and uses a signal processing method to eliminate FEXT interference.
As shown in FIG. 2, for an uplink direction, the CO performs signal joint receiving processing. First, it is assumed that signals sent by K users form a channel input vector, which is a K×1 column vector x=(x1, x2, . . . , xk)T; a transmission channel H represents a crosstalk channel between DSLs on a subcarrier of a frequency domain, H is a K×K channel transmission matrix, and an expression is as follows:
                    H        =                              [                                                                                h                    11                                                                                        h                    12                                                                    …                                                                      h                                          1                      ⁢                      K                                                                                                                                        h                    21                                                                                        h                    22                                                                    …                                                                      h                                          2                      ⁢                      K                                                                                                                    ⋮                                                  ⋮                                                  ⋱                                                  ⋮                                                                                                  h                                          K                      ⁢                                                                                          ⁢                      1                                                                                                            h                                          K                      ⁢                                                                                          ⁢                      2                                                                                        …                                                                      h                    KK                                                                        ]                                K            ×            K                                              (                  Formula          ⁢                                          ⁢          1                )            
where hij represents a transmission equation from a channel j to a channel i. Further, b is used to represent a K×1 noise vector, and is a K×1 column vector; Y represents a channel output vector, and is a K×1 column vector. An expression of the channel output vector Y is as follows:y=Hx+b  (Formula 2).
In order to eliminate crosstalk, signal joint receiving processing is performed at the CO, a crosstalk elimination processor is introduced to a receiver, the crosstalk elimination processor generates a K×K crosstalk elimination matrix W, W makes WH be a diagonal matrix, and then processing is performed on the signal output vector y according to Formula 3, so as to obtain a processed channel output vector {tilde over (y)};{tilde over (y)}=WHx+Wb  (Formula 3).
As WH is a diagonal matrix, the crosstalk can be eliminated.
As shown in FIG. 3, for a downlink direction, signal joint sending processing is performed at the CO. Similarly, it is assumed that there are K users, the CO needs to send signals to the K users to form a K×1 column vector x; in order to eliminate transmission channel crosstalk, a vector precoding processor is introduced to the CO, the vector precoding processor generates a K×K precoding matrix P, P makes HP be a diagonal matrix, and in this case, the sent signals are {tilde over (x)} which has an expression as follows:{tilde over (y)}=Px  (Formula 4).
A signal received by a receiving unit of the user is:{tilde over (y)}=HPx+b  (Formula 5).
Because HP is a diagonal matrix, the crosstalk can be eliminated.
Based on the aforementioned principle, the prior art proposes a centralized vectored-DSL system. As shown in FIG. 4, the system includes N boards, each board controls n users, and user data of all boards is all transmitted to a centralized vector processor to perform data processing to eliminate crosstalk. The centralized vector processor has functions of both a crosstalk elimination processor and a vector precoding processor.
For an uplink direction, each board sends data of n users, which passes through a first data processing unit, to the centralized vector processor, so that the centralized vector processor receives data Hx of all N*n users, Hx is an (N*n)×1 column vector; the centralized vector processor generates an (N*n)×(N*n) crosstalk elimination matrix W, the centralized vector processor needs to perform calculation of W*Hx, and since components of each vector are plural, 4(N*n)2 multiplication operations and 3(N*n)2−(N*n) addition operations are required to be performed in the process; then, the centralized vector processor returns the processed data to the corresponding board, and subsequent data processing is performed.
For a downlink direction, the centralized vector processor generates a precoding matrix P, and performs a vector operation of P*x. Similarly, 4(N*n)2 multiplication operations and 3(N*n)2−(N*n) addition operations are also required to be performed.
Using of the vectored-DSL technology to perform precoding and crosstalk elimination has high real-time requirements, so that when an existing centralized vectored-DSL system is used, a centralized vector processor is required to be able to process user data on all boards in real time, thereby requiring the centralized vector processor to have very high data processing capability. Because the number of users increases, the data processing capability requirement on the centralized vector processor increases. The data processing capability of the existing centralized vector processor limits user capacity of a vectored-DSL system.